This invention relates to a semiconductor device and a manufacturing method thereof, and particularly relates to a semiconductor device having interconnections connected to contact plugs arranged in array and a manufacturing method of such a semiconductor device.
As high integration of MOS integrated circuits has been rapidly progressed, elements are now formed by using fine-pattern technology to its utmost limit. Under such circumstances, there are demands in fabrication of integrated circuits that holes be formed to have as small a diameter as possible and as small a hole-to-hole distance as possible according to available lithography techniques.
Element structures requiring formation of holes include those in which interconnections are connected to contact plugs the top of which are covered with an insulation film. Specifically, holes are opened in the insulation film covering the contact plugs, and electrical connection is established between the contact plugs and the interconnections formed on the insulation film, for example by filling the holes with a conductive material.
Conventionally, these holes are formed in one-to-one relationship to the contact plugs. (This type of technology is described for example in Japanese Laid-Open Patent Publication No. 2007-287794). Therefore, when a plurality of contact plugs are formed in a high density, holes corresponding to thereto must be formed in a similarly high density.